Single-poly floating-gate transistor comprising an erase gate formed in the substrate

  • Application ID: EP13170432
  • Status: GRANT OF PATENT INTENDED

Applicant

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Attorney

operating since 1989
Headquarter in Munich
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Specialization

This patent has the IPC combination G11 (INFORMATION STORAGE) and H01 (BASIC ELECTRIC ELEMENTS) is specialized in the combination G11 and H01. We found, that Becker Kurig Straus, Fuchs Patentanwälte Partnerschaft mbB, Cabinet Michel de Beaumont SAS, Cabinet Thierry Schuffenecker, Optimus Patents Ltd and 5 others are specialized in all of these IPC classes. For a similar patent, they might be a good choice.

Timeline

  • 10.12.2014 - Publication A1 (EP2811530)

IPC Classification