Priority Date: 23.08.11 (US 201113215968)

SEMICONDUCTOR DEVICE STRUCTURES INCLUDING VERTICAL TRANSISTOR DEVICES, ARRAYS OF VERTICAL TRANSISTOR DEVICES, AND METHODS OF FABRICATION

  • Application ID: EP12825988
  • Status: GRANT OF PATENT INTENDED

Applicant

Technology company logo small
Technology Company

Attorneys

operating since 1887
Headquarter in London and 18 offices
active in Legal Services, IP Consulting, and Matchmaking and Trading
operating since 1887
Headquarter in London and 18 offices
active in Legal Services, IP Consulting, and Matchmaking and Trading

Specialization

This EP application has the IPC class H01 (BASIC ELECTRIC ELEMENTS). Marks & Clerk LLP, Marks & Clerk LLP is specialised in H01 (BASIC ELECTRIC ELEMENTS). Here you find a list of all patent agent firms which are specialized in this IPC class. For a similar patent, they might be a good choice.

Timeline

  • 23.08.2011 - Priority Date (US 201113215968)
  • 28.02.2013 - Publication A2 (WO2013028685)
  • 02.07.2014 - Publication A2 (EP2748856)

IPC Classification